To fabricate a mechanical structure, for example Microelectromechanical System (“MEMS”) structures, the structure is etched in a wafer. In one example, the wafer comprises a silicon layer and a backing layer, such as photoresist. The etch in one example comprises a Deep Reactive Ion Etch (“DRIE”). The etch comprises a plasma. The plasma in one example contains ions. The ions serve to etch the structure.
During a through-etch of the wafer, the backing layer is exposed. A charge buildup on the structure results from the ions in the etch. The charge buildup serves to deflect the ions to one or more sidewalls of the structure. The deflection of ions results in an undercutting of the sidewalls and/or a creation of one or more protruding features on the structure. In Microelectromechanical System devices, vertical, symmetric sidewalls that lack protruding features are desired.
Turning to FIG. 5 for purposes of illustration, an exemplary wafer portion 505 comprises a silicon layer 515, a backing layer 520, and a mask layer 525. The silicon layer 515 comprises silicon and/or doped silicon. The backing layer 520 comprises a photoresist. The mask layer 525 in one example comprises silicon dioxide.
The wafer portion 505 is through-etched during an etch process that etches a structure 502 within the silicon layer 515. The structure 502 comprises sidewalls 525 and 526. During the through-etch of the structure 502, the backing layer 520 is exposed. Where the backing layer 520 comprises a non-conductive material, (for example, photoresist) a charge buildup results in the structures 530 and 531. The charge buildup deflects ions from the etch process onto the sidewalls 525 and 526 resulting in etching of the sidewalls 525 and 526. The ions produce an undercut 530 in the sidewall 525 and an undercut 531 in the sidewall 526, as will be understood by those skilled in the art.
Thus, a need exists for a reduction of the charge buildup on one or more structures of the wafer.